The present invention relates to a method and/or architecture for bus controllers generally and, more particularly, to embedded firmware on a small computer system interface controller.
Modern Small Computer System Interface (SCSI) controller designs incorporate multiple processors that allow several tasks to be performed simultaneously. Firmware executing on the processors communicate with each other by passing pointers around that point to messages that describe the input/output data. The messages are stored in a local memory having a 32-bit addressing scheme. Since the messages are longer than 32 bits, they may be stored as a local message frame (LMF) starting at a local message frame address (LMFA).
Pointers are used to show the firmware where the local message frames 152 are stored in the local memory. Referring to FIG. 1, a diagram of a pointer 100 is shown. The pointer 100 is referred to as a request message frame descriptor (RMFD). Each pointer 100 stores a 32-bit LMFA. The LMFA is an absolute address of a first word of the LMF.
Referring to FIG. 2, a block diagram of a conventional controller 102 is shown. The conventional controller has a local memory 104 and a queue 106. The local memory 104 is divided into frames 108 or blocks. Each frame 108 contains an LMF 110. The queue 106 is divided into multiple 32-bit words 112. Each word 112 stores an RMFD or pointer 100.
Inefficiency is created by storing the RMFDs as 32-bit words. The 32-bit RMFDs allows 4 billion unique locations to be addressed in the local memory 104. The local memory 102 is not made this large due to power, space, and cost considerations. Likewise, the queues 106 have a fixed amount of capacity for reasons of power, space, and cost. In practice, a capacity of the queue 106 has become a limiting factor in a number of the LMFs 110 that the conventional controller 102 can process.
The present invention concerns a circuit comprising a memory, a queue, and a translator. The memory may be configured to store a message at an address at least as great as a base address. The queue may be configured to store a descriptor, wherein the descriptor is configured to have (i) an index, (ii) a routing field, and (iii) fewer bits than the address. The translator may be configured to translate between the address and the index.
The objects, features and advantages of the present invention include providing a method and/or architecture for embedded firmware on a SCSI bus controller that may (i) reduce memory capacity and/or (ii) improve performance.